FIGS. 20(a) and 20(b) are views showing a structure of a conventional GaAs solar cell on a Si substrate, in which FIG. 20(a) is a plan view and FIG. 20(b) is a sectional view taken along a line 20(b)-20(b) in FIG. 20(a). In the figures, reference numeral 1 designates a Si substrate. An n type GaAs layer 2 and a p type GaAs layer 3 which serve as active layers are laminated on a first main surface 1a of the Si substrate 1 and then an anode electrode (p type electrode) 6 is formed on the p type GaAs layer 3 and a cathode electrode (n type electrode) 5 is provided on a second main surface 1b of the Si substrate 1. Thus, a solar cell 21 is formed.
The GaAs solar cell 21 on the Si substrate is normally manufactured by the following method.
First, the n type GaAs layer 2 and the p type GaAs layer 3 are sequentially formed on the first main surface 1a of the n type Si substrate 1 having a surface orientation of approximately (100) by a method of crystal growth of a compound semiconductor, such as MOCVD. Thus, a pn junction 4 which exhibits the photovoltaic effect is formed. Then, as an electrode for collecting the photocurrent, the anode electrode (p side electrode) 6 is selectively formed on the p type GaAs and the cathode electrode (n side electrode) 5 is formed on the whole surface of the second main surface 1b of the Si substrate 1. The anode electrode 6 comprises collecting electrodes 6a for collecting a photoelectric current and a common electrode 6b for connecting the collecting electrodes to an outside circuit. In addition, these electrodes are formed by sputtering or a vapor deposition method and Ti/Ag is normally used.
However, the conventional GaAs solar cell on the Si substrate has the following problems. That is, since the n type GaAs layer 2 and the p type GaAs layer 3 are usually formed at a high temperature of 700.degree. to 800.degree. C., when a wafer on which the above GaAs layers are formed reaches room temperature, a large warpage is generated because of the difference in thermal expansion coefficients between GaAs and Si as shown in FIG. 20(b). As the thickness of the GaAs layer is increased, the degree of this warpage increases. When the thickness of the GaAs layer exceeds 3 .mu.m, a crack is generated. On the other hand, as the thickness of the GaAs layer is increased, the dislocation density in the GaAs layer is reduced. Therefore, in order to assure sufficient performance as a solar cell, the thickness should be 4 to 5 .mu.m. Thus, a crack is generated in the operational layer (active layer) of the conventional solar cell. Particularly, a region surrounded by the crack 7 on which the collecting electrode 6a is not provided, which region is shown by slanted lines in FIG. 20(a), is a loss region because the generated photoelectric current can not be collected.
In addition, even if a crack is not generated, since considerable thermal stress remains in the GaAs layer, when slight stress is applied from the outside, a crack is easily generated in the GaAs layer. Since the warpage is concave when the GaAs layer is on the upper side as shown in FIG. 20(b), a crack is easily generated when a stress is applied from the direction of the second main surface 1b of the Si substrate, that is, when a tensile stress is applied to the GaAs layer. Therefore, when the wafer is flattened in a photolithography process for patterning the p type electrode 6 or when interconnector welding is performed on the first electrode 5 side in the assembling process, a crack is obviously generated.
Meanwhile, GaAs on a Si substrate in which a crack is prevented from being generated later by intentionally generating a crack at a predetermined position to relieve thermal stress is disclosed in Appl. Phys. Lett. 55(21), 20 Nov. 1989, pp.2187 to 2189. FIG. 21 is a view showing a principle for manufacturing the above solar cell. In FIG. 21, reference numeral 25 designates a mask formed on the Si substrate, which is used for selectively growing GaAs, reference numeral 26 designates a wedge, and reference numeral 27 designates a crack generated in the GaAs layer from the end of the wedge.
According to this conventional example, when the GaAs active layer is selectively grown on the Si substrate using the mask having the wedge 26, the crack 27 is generated in the GaAs layer from an end of the wedge 26. Thus, thermal stress in an element is relieved by the crack, so that the crack is prevented from being generated later. Therefore, it is possible to prevent generation of an inactive region by forming the collecting electrode so that no region is surrounded by a crack and in which the collecting electrode exists with due regard to the position of the crack 27.
However, the Si substrate surface is difficult to satisfactorily clean in a case where GaAs is selectively grown by using the mask as shown in the conventional example, and it is desired that the Si substrate on which GaAs is to be grown should be clean when the GaAs solar cell on the Si substrate is manufactured.